Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5b697aa5d3346981b6c6de88dcb0d50d |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-963 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02052 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76802 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02063 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-306 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-44 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-4763 |
filingDate |
2004-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2007-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_23b6b33863004f7a5f7941c34197f11c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_97a90246c91c195cb5d078c82c44f37a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b241c9fd26fc23db0d0a4cb91179113e |
publicationDate |
2007-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-7235489-B2 |
titleOfInvention |
Device and method to eliminate shorting induced by via to metal misalignment |
abstract |
The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided. |
priorityDate |
2004-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |