http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7208326-B2

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filingDate 2004-10-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2007-04-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_01de3fcc9d142c59a2f07a38f61d0cca
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publicationDate 2007-04-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-7208326-B2
titleOfInvention Edge protection process for semiconductor device fabrication
abstract An edge protection process for semiconductor device fabrication includes forming a protective layer on the circumferential edge region of a semiconductor substrate. The semiconductor substrate is placed in a plasma atmosphere and trench structures, such as deep trenches and shallow trench isolation structures are etched in the substrate. The protective layer substantially prevents the etching of the circumferential edge region, such that the formation of black silicon is substantially minimized during the etching process.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10629458-B2
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10832923-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011146703-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8562750-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9997381-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8536025-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8398778-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10804081-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103681970-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008227301-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10892404-B1
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Total number of triples: 34.