| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0e433c1625fc509a087c912b440da84b |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31629
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02131
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-022
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31612
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76801 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2003-08-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2005-11-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d6a22b744a2e6be4b1596453b03b5f4c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b1b8fc8770771ffee16864d30b5ce558
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8b40bc7522bb766c8b7e248ec592d42e |
| publicationDate |
2005-11-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-6962883-B2 |
| titleOfInvention |
Integrated circuit insulator and method |
| abstract |
A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition ( 202 ) followed by high capacitively-coupled RF bias for planarizing deposition ( 204 ) limits the charge build up on the underlying structure ( 104, 106, 108 ). |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2006144817-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7700494-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7169440-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2003192856-A1 |
| priorityDate |
1996-08-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |