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filingDate 2002-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ea123b81edf348abf284473ffce5e7e1
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publicationDate 2004-10-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-6809967-B2
titleOfInvention Data writing method for semiconductor memory device and semiconductor memory device
abstract A semiconductor integrated circuit device includes a first data transfer line electrically connected to a first memory cell block, a second data transfer line electrically connected to a second memory cell block, a charge circuit which charges any one of the first and second data transfer lines, a first data store circuit, second and third data store circuits electrically connected to the first data store circuit, a charge/discharge circuit which charges or discharges a voltage node on the basis of the data held in the third data store circuit, a first connecting circuit which electrically connects the voltage node to any one of the first and second data transfer lines, a fourth data store circuit, and a second connecting circuit which electrically connects the fourth data store circuit to the voltage node.
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7813174-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8093664-B2
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2005157558-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7593260-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10395716-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008001206-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009218637-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8599619-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11017832-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009303791-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10566043-B2
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