http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6790777-B2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0e433c1625fc509a087c912b440da84b |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-974 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-906 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-913 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate | 2002-11-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2004-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c5a4423e49e4cf28d5749182b1de7138 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5f108284734217beb4bfa0e475231393 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0679b964fcb58dc2cbdd5d642a0302a0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d7bb65338a5143a253a3278d4b6730ec |
| publicationDate | 2004-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-6790777-B2 |
| titleOfInvention | Method for reducing contamination, copper reduction, and depositing a dielectric layer on a semiconductor device |
| abstract | The present invention relates to a method for improving an interface of a semiconductor device. The method comprises providing a first and second substrate having an oxidized region, and establishing a first loading position in a first process chamber. The first and second substrates are consecutively inserted into the first process chamber and generally simultaneously processed, wherein the oxidized region is reduced by exposure to a first plasma. The first and second substrates are then consecutively removed and the first substrate is inserted into a second process chamber and subsequently processed. The second substrate is then inserted into the second process chamber and the first and second substrates are simultaneously processed. The first substrate is the removed, and the second substrate is processed again. According to one exemplary aspect, the first and second substrates are exposed to a first temperature in the first process chamber for approximately half the time the first and second substrates are exposed to a higher second temperature in the second process chamber while maintaining throughput of substrates. |
| priorityDate | 2002-11-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.