| abstract |
A nonvolatile memory apparatus which includes a plurality of terminals including clock, command and other terminals, a control circuit, and a plurality of nonvolatile memory cells. The clock terminal receives a clock signal. The command terminal receives commands including read and program commands. The control circuit reads out operation steps from a program memory for controlling operation of said apparatus by executing the operation steps. In response to a read command, the control circuit controls reading data from the nonvolatile memory cells, and outputting data via the other terminal not the command terminal based on the clock signal. In response to a program command, the control circuit controls receiving data via the other terminal not the command terminal based on the clock signal, and writing data to the nonvolatile memory cells. |