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filingDate 2001-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2004-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_92d3e54b9bcae87bd892d8ce7365628b
publicationDate 2004-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-6709960-B1
titleOfInvention Laser anneal process for reduction of polysilicon depletion
abstract A method of manufacturing a MOSFET semiconductor device includes forming a gate electrode oxide over a substrate; depositing a first layer of polysilicon over the gate oxide; implanting dopants in the first layer; depositing a second layer of polysilicon over the first layer; etching both layers to form a gate electrode; forming source/drain extensions in the substrate; forming first and second sidewall spacers; implanting dopants within the substrate to form source/drain regions in the substrate; and laser thermal annealing to activate the source/drain regions and to melt the first layer. The first layer can have a depth of about 200 to 500 angstroms, and the second layer can have a depth of about 300 to 4500 angstroms. The source/drain extensions can have a depth of about 50 to 300 angstroms, and the source/drain regions can have a depth of about 400 to 1000 angstroms. The laser thermal annealing can also melt amorphitized portions of the second layer.
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