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filingDate 2002-02-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2003-09-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_efa48f3686cda3554573de107f21ae3c
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publicationDate 2003-09-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-6624466-B2
titleOfInvention Implant method for forming Si3N4 spacer
abstract A method is disclosed to form a reliable silicon nitride spacer between the lower edges of the floating gate and the control gate of a split-gate flash memory cell. This is accomplished by forming a floating gate with vertical sidewalls, forming a high temperature oxide layer followed by silicon nitride layer over the floating gate including the vertical sidewalls, ion implanting the nitride layer and then selectively etching it to form a robust silicon nitride spacer of well defined rectangular shape.
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