Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3a62c92e56568bd104089aac22ca487b |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28562 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5222 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76846 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76873 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53223 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32051 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 |
filingDate |
2001-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2003-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3aad83d4275a480483917faa5e52c347 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e2004bae0783ebf5555db0e639843694 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_63eaab1acff6cebfc49c480056dbbcaf |
publicationDate |
2003-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-6590288-B1 |
titleOfInvention |
Selective deposition in integrated circuit interconnects |
abstract |
An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A first conductor core is connected to the semiconductor device. A low dielectric constant dielectric layer is formed over the semiconductor substrate and has an opening formed therein. A first barrier layer is deposited over the first conductor core. A second barrier layer is deposited to line the low dielectric constant dielectric layer and the first barrier layer. A third barrier layer is deposited to line the second barrier layer. A second conductor core is deposited to fill the opening over the third barrier layer. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7943506-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-100397636-C http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9390970-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008157371-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6724087-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7372163-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2006216925-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2003067079-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2005037609-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007178682-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7095120-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7777346-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009115063-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7709965-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008188075-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7569476-B2 |
priorityDate |
2001-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |