| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2c78d80e9d323ad7c79518c80e0b8d16 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-981 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823857
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823842
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823878 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
| filingDate |
2000-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2003-06-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e9a4a2a32863f521981d5d137daa7069
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3d33ba8c6528e65378c600901db38ad9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1929a648acdb2466030419a04eaeba33 |
| publicationDate |
2003-06-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-6583011-B1 |
| titleOfInvention |
Method for forming damascene dual gate for improved oxide uniformity and control |
| abstract |
A method to grow layers of gate oxide or gate base materials of different thicknesses for dual gate structures. The process starts with a semiconductor surface in which STI regions have been formed and over the surface of which a layer of gate base material has been grown. A dielectric, such as nitride, is deposited, masked and etched over a first region where thin gate base material must be created thereby exposing the surface of the deposited layer of gate base material in that region. The gate base material is etched to the desired thickness, creating a first thin layer of gate base material. A thick first layer of gate electrode material, poly, is deposited over the dielectric thereby including the surface of the first thin layer of gate base material, and polished down to the surface of the dielectric leaving gate electrode material deposited in the opening above the first thin layer of gate base material. The process creates over a second region of the gate base material a gate electrode having a second thickness of the gate base material. The dielectric is removed leaving gate electrode structures in place above thin layers of gate base materials, the latter being of different thicknesses. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6979607-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2004150067-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2006054956-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2002113262-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7235837-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2004106251-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6909138-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2002093045-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6888749-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7737509-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007228438-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6881624-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6955971-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2009010042-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6864139-B2 |
| priorityDate |
2000-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |