| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T29-49146
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-854
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-48
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-274
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00014
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-12042
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T29-49171
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73265
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01039
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-902
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-293
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-56 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-29
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-56 |
| filingDate |
2002-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2003-05-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_78459e4a4ada09e9979d633d8c20d2a7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1487070979eeddef8463c7d05e6962fc
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6e5b838283931e92719550fac5987ddd |
| publicationDate |
2003-05-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-6559519-B2 |
| titleOfInvention |
Integrated circuit device having cyanate ester buffer coat and method of fabricating same |
| abstract |
An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads through such openings. Further, an integrated circuit device is provided that includes a fabricated wafer including a plurality of integrated circuits fabricated thereon. The fabricated wafer has an upper surface with a cyanate ester buffer coating material cured on the upper surface of the fabricated integrated circuit device. Further, a method of producing an integrated circuit device includes providing a fabricated wafer including a plurality of integrated circuits and applying a cyanate ester coating material on a surface of the fabricated wafer. The application of cyanate ester coating material may include spinning the cyanate ester coating material on the surface of the fabricated wafer to form a buffer coat. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2005214330-A1 |
| priorityDate |
1996-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |