| abstract |
An insulated-gate thin film transistor comprises a gate electrode and source and drain electrodes. The source and drain electrodes are laterally spaced apart, and are vertically separated from the gate electrode by a gate insulator layer and an amorphous silicon layer. A region of the amorphous silicon layer is vertically aligned with the lateral spacing between the source and drain electrodes defining the transistor channel, and the region of the amorphous silicon layer has a thickness of less than 100 nm, and is doped with phosphorus atoms with a doping density of between 2.5×10 16 and 1.5×10 18 atoms per cm 3 . This enables the mobility to be increased so that the thickness reduction of the silicon layer can be tolerated. This thickness reduction enables the photosensitivity of the layer to be reduced sufficiently to avoid the need for a black mask layer. |