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filingDate 1998-07-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2002-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c524d51a047a082ceac2277061e87930
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publicationDate 2002-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-6392264-B2
titleOfInvention Semiconductor memory device and method of producing the same
abstract A semiconductor memory device has access transistors with a gate and a pair of impurity diffusion layers formed on a semiconductor substrate and memory capacitors with a storage node electrode and a cell plate electrode. The electrodes are connected to each other via a capacitive insulating layer made of a ferroelectric material. The storage node electrode has a surface covered with the capacitive insulating layer and is formed in a shape of column on one of the pair of impurity diffusion layers in a hole formed from an inter-layer insulating film covering the access transistor to the one of the pair of impurity diffusion layers. A upper surface of the column does not exceed the inter-layer insulating film. The storage node electrode formed in the hole face the cell plate electrode via the inter-layer insulating film.
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010072531-A1
priorityDate 1997-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 44.