http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6137177-A

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filingDate 1998-10-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2000-10-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_38c3bc83d408609840f9f513fc2776b0
publicationDate 2000-10-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-6137177-A
titleOfInvention CMOS semiconductor device
abstract There is provided a method of fabricating a CMOS semiconductor device including nMOSFET and pMOSFET, including the steps of (a) forming a gate insulating film on a semiconductor substrate, (b) forming a first polysilicon film on the gate insulating film, (c) forming an interlayer insulating film on the first polysilicon film, (d) forming a second polysilicon film on the interlayer insulating film, (e) shaping the first polysilicon film, the interlayer insulating film, and the second polysilicon film into a gate electrode in both a first region where the nMOSFET is to be fabricated and a second region where the pMOSFET is to be fabricated, and (f) doping n-type impurities into the first region and p-type impurities into the second region by ion-implantation. The method makes it possible to prevent reduction in dielectric voltage of a gate insulating film, which would be caused by diffusion of titanium atoms, without causing a gate electrode to be depleted.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6693341-B2
priorityDate 1997-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 38.