http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5864508-A

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filingDate 1997-06-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1999-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4165901e404236cf974040239a9592c8
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publicationDate 1999-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-5864508-A
titleOfInvention Dynamic random-access memory with high-speed word-line driver circuit
abstract A random-access memory includes an array of rows and columns of memory cells. Word lines are associated with rows of memory cells, bit lines lines are with columns of memory cells. A row decoder and a core control circuit are connected to the word lines. A column decoder and a sense amplifier circuit are connected to the bit lines. An individual cell may be addressed by addressing an individual column through a column decoder controlling the voltage on each word line, and through a row decoder controlling the voltage on each word line in response to specified row and column addresses input via row and column address buffers. A booster circuit provides the row decoder with a boosted voltage as a word-line drive voltage. This voltage has been transmitted to a pre-decoder section in the core control circuit before the row address is acquired in the row decoder.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2004085847-A1
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7085190-B2
priorityDate 1990-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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