| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16191152b167dddee0d2ff26074a219 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-105 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0688 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-105 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate |
1995-05-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
1996-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_07d843449570cd4e1688a183a9cc4c26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_db875d403631b70a978911ac2b4d31c1 |
| publicationDate |
1996-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-5527722-A |
| titleOfInvention |
Method of fabrication of a semiconductor device having high-and low-voltage MOS transistors |
| abstract |
A semiconductor device (76) is provided with a high-voltage portion including NMOS transistor (78) and PMOS transistor (82b) and a low-voltage portion including NMOS transistor (80) and PMOS transistor 82(a). The high-voltage NMOS transistor (78) includes source/drain regions (90a, 90b) having N- regions (90a 1 , 90b 1 ) that are self-aligned with a gate (78) and N+ regions (90a 2 , 90b 2 ) that are self-aligned with sidewall spacers (91) formed on sidewalls of the gate (78) to improve reliability under continuous high voltage operating conditions. The low voltage NMOS transistor includes source/drain regions (92a, 92b) that are self-aligned with sidewall spacers (92) to permit channel lengths to be scaled to less than 2 microns. The low-voltage PMOS transistor (82a) and high-voltage PMOS transistor (82b) include source/drain regions (116a-16d) that are self-aligned with sidewall spacer extension regions (110a) formed over sidewall spacers (91) permitting low-voltage PMOS transistor channel lengths to be scaled to less than 2 microns. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-0063964-A3
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007298570-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6077736-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6133077-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2005106827-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8946003-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1075016-A2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6090652-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6165825-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7144780-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7781843-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2003199133-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7718495-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007148873-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-0120666-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6451640-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6143613-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6010929-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-0063964-A2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6348382-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6258646-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6093585-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5643815-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6194766-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6284607-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7833892-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1075016-A3
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2006057798-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5844276-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007141821-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7560779-B2 |
| priorityDate |
1993-11-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |