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filingDate 2021-06-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2022-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2022416043-A1
titleOfInvention Reduced contact resistivity with pmos germanium and silicon doped with boron gate all around transistors
abstract Gate-all-around integrated circuit structures having confined epitaxial source or drain structures, are described. For example, an integrated circuit structure includes a plurality of nanowires above a sub-fin. A gate stack is over the plurality of nanowires and the sub-fin. Epitaxial source or drain structures are on opposite ends of the plurality of nanowires. The epitaxial source or drain structures comprise germanium and boron, and a protective layer comprising germanium, silicon and boron that at least partially covers the epitaxial source or drain structures to provide low contact resistivity.
priorityDate 2021-06-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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