http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022269435-A1

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filingDate 2021-02-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9f4b47aad41ad9ad7492d1844bbd3c24
publicationDate 2022-08-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2022269435-A1
titleOfInvention Dynamically Throttling Host Write Data Rate
abstract The present invention extends to methods, systems, and computer program products for dynamically throttling host write data rates, for example, at SSDs. Host write data is received from a host at a host write data rate. The host write data is buffered in an SSD buffer at the host write data rate. Some host write data is transferred from the SSD buffer to NAND storage at an internal NAND data rate. A host write throttle is calculated at least based on the host data rate and the internal NAND data rate. The host write throttle defines a new (e.g., increased or decreased) host write data rate. The host write throttle is sent to the host requesting the host utilize the new host write data rate. When a new host write data rate is decreased, data transfer from SSD buffer to NAND storage can be allowed to “catch up”.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11556258-B1
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priorityDate 2021-02-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 27.