| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_593fdfcdad558e01218a4a2458d3151f |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2933-0025
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-62
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2933-0066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-3201 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-62
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-102
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-005
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-0054
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-0066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-44
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-035272 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-62
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-44 |
| filingDate |
2021-08-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_82b6a3184cc6c232fff3c720e87f96b9 |
| publicationDate |
2022-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2022262986-A1 |
| titleOfInvention |
Semiconductor device and fabricating method therefor |
| abstract |
The present invention relates to a semiconductor device ( 10 ), comprising a substrate ( 11 ), a semiconductor layer ( 12 ), a stressor layer ( 13 ), an insulator barrier ( 14 ) and a plurality of electrical connectors. The semiconductor layer ( 12 ) is sandwiched between the substrate ( 11 ) and the stressor layer ( 13 ). The stressor layer ( 13 ) is on top of the semiconductor layer ( 12 ) and is capable of inducing strain on the semiconductor layer ( 12 ). A method for fabricating a semiconductor device comprises the steps of forming a substrate ( 110 ), epitaxially growing a semiconductor layer on the substrate ( 120 ), depositing a stressor layer on the semiconductor layer ( 130 ) and forming a plurality of electrical connectors ( 140 ), wherein the electrical connectors are capable of electrically connecting the semiconductor device to an external circuit. |
| priorityDate |
2020-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |