| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02123
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0337
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-38
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31127
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-0752
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76802
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0274
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0332
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-095 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G03F7-095
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G03F7-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G03F7-38 |
| filingDate |
2022-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fee656cdfd4e1cfc97b65693288e942d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4f9b903aa6dbf493b8b2989e47afff85
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5ef747d6903b0e84e47f8cf27f62d92f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0a60b3e8f347768ce06bae508ccc5f33 |
| publicationDate |
2022-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2022260918-A1 |
| titleOfInvention |
Pattern formation method and material for manufacturing semiconductor devices |
| abstract |
In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed. |
| priorityDate |
2018-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |