| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_aef6c5592d34bfb1088319a89b7f2885 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N10-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L39-223
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N10-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N60-12 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06N10-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06N10-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L39-22 |
| filingDate |
2021-10-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9cc9075fbe4cd29a5ef181bd39c1e744
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e85192c3ae8f38f8aec2fa3de5c020d4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e423f2c48552293e94efde5c97f09f4f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3d7fbbf7593cf9ce4cda5bcaf5d65967
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1365d3acc06350c4083336a0c50414b4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_419f9dc0c0767458e97c8f8e4c1e5fa3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_35fb6a6031713c3911d916c9379bed15
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_68ba0ce97a3391758eab76b621597b51 |
| publicationDate |
2022-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2022237495-A1 |
| titleOfInvention |
Interconnections between quantum computing module and non-quantum processing modules in quantum computing systems |
| abstract |
The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules. |
| priorityDate |
2020-10-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |