http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022068190-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a62555ff12316a9a118542896b4c0af7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f076254de378f5d7b943bee39460a31b |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2330-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2330-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0267 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0426 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-006 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-2092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3266 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-00 |
| filingDate | 2020-11-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1702ca22e7382dcff21e3de02b5b5f1a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_221698159a811e607184bb8fdd09cf72 |
| publicationDate | 2022-03-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2022068190-A1 |
| titleOfInvention | Gate driving circuit, display device and repair method |
| abstract | The present disclosure relates to a gate drive circuit. The gate drive circuit includes: cascaded GOA units, first clock signal lines, second clock signal lines, connecting lines and electrostatic protection sub-circuits. The first clock signal lines are used to provide various clock signals to the GOA units. The second clock signal lines are used to, when any of the clock signal lines is broken, replace the broken clock signal line to transmit a corresponding clock signal. The electrostatic protection sub-circuits are electrically connected to corresponding first clock signal lines or corresponding second clock signal lines through the connecting lines. Orthographic projections of the connecting lines on a plane where corresponding first clock signal lines or corresponding second clock signal lines are located intersect with the corresponding first clock signal lines and the corresponding second clock signal lines, respectively. |
| priorityDate | 2019-11-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 56.