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filingDate 2020-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_52279f91ab9b124e3843524c9b293ba7
publicationDate 2022-02-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2022059177-A1
titleOfInvention Encoding test data of microelectronic devices, and related methods, devices, and systems
abstract Memory devices are disclosed. A memory device may include a number of column planes, and at least one circuit. The at least one circuit may be configured to receive test result data for a column address for each column plane of the number of column planes of the memory array. The at least one circuit may also be configured to convert the test result data to a first result responsive to only one bit of a number of bits of the number of column planes failing a test for the column address. Further, the at least one circuit may be configured to convert the test result data to a second result responsive to only one column plane failing the test for the column address and more than one bit of the one column plane being defective. Methods of testing a memory device, and electronic systems are also disclosed.
priorityDate 2020-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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