http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2021408092-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f3518dca003902d9f332ad08ac9a6ffe |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61B1-051 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A61B1-05 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14634 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14636 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14643 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14689 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1469 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-304 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 |
| filingDate | 2019-10-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_52cc0bee7aa6963ce88f77f359eaf462 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_583143ed48c807e86ba1b50e4af34926 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f0c87052dae52bc1ad44e11c18d02b43 |
| publicationDate | 2021-12-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2021408092-A1 |
| titleOfInvention | Image device |
| abstract | Provided is an imaging device ( 1 ) including: an imaging element ( 10 ); and a semiconductor element ( 20, 30 ) provided to be opposed to the imaging element and electrically coupled to the imaging element. The semiconductor element includes: a wiring region ( 20 A, 30 A) provided in a middle portion and a peripheral region ( 20 B, 30 B) outside the wiring region; a wiring layer ( 22, 32 ) having a wiring line in the wiring region; a semiconductor substrate ( 21, 31 ) opposed to the imaging element with the wiring layer interposed therebetween and having a first surface (Sa, Sc) and a second surface (Sb, Sd) in order from a side of the wiring layer; and a polishing adjustment section ( 23, 33 ) including a material that is lower in polishing rate than a constituent material of the semiconductor substrate, the polishing adjustment section being disposed in at least a portion of the peripheral region and provided in a thickness direction of the semiconductor substrate from the second surface. |
| priorityDate | 2018-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 26.