| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2029-1204 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4085
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4082
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4096
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4087
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4094
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-10 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4096
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4094
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-408 |
| filingDate |
2020-06-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_deb0b1886024417e053b66ffbfa6840c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a1abaf001355b3a0fed526b428bf4089 |
| publicationDate |
2021-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2021398585-A1 |
| titleOfInvention |
Processing of unassigned row address in a memory |
| abstract |
Semiconductor devices that include circuitry to mitigate unstable or metastable states in logic circuits in response to receipt of an unassigned row address. The semiconductor device may include one or more logic circuits that are configured to adjust particular address-based control signals to mitigate processing based on the unassigned row address. For example, the one or more logic circuits may override processing of the unassigned row address to provide control signals that correspond to an assigned row address, which may allow the semiconductor device to operate in a known state, rather than performing operations based on an unassigned row address. |
| priorityDate |
2020-06-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |