| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-2254
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-005
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K2005-00241
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K2005-00019
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0818
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-131
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0814 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-00 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-131
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-081 |
| filingDate |
2020-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_72067edcf34f9ce707d73bb44ec5d99e |
| publicationDate |
2021-07-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2021217457-A1 |
| titleOfInvention |
Apparatuses and methods for delay control |
| abstract |
Apparatuses and methods for adjusting a phase mixer circuit are disclosed. An example method includes providing data values stored by a plurality of first registers and a plurality of second registers. The method includes: during a first mode of operation, receiving the data values by groups of first registers of the plurality of the first registers and holding the data values by the plurality of second registers; during a second mode of operation, inverting a data value by one first register of the plurality of first registers at a time and holding the data values by the plurality of second registers; and during a third mode of operation, either inverting the data value by one first register of the plurality of first registers while holding the data values by the plurality of second registers or inverting a data value by one second register of the plurality of second registers while holding the data values by the plurality of first registers. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11398824-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11437085-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11742017-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022343965-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11568916-B2 |
| priorityDate |
2020-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |