| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_82a9e22a923eca64a02a97f0dfb493ed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L2207-06 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04B17-21
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0891
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-099
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03C3-0958
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-193 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-099
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-089
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04B17-21 |
| filingDate |
2020-09-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_679ca248eefd1d3fa006681e27c8973b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d8ea43dad20bcb24927ccdb43f392e37
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c666aebf3778c1e5245def765bf81b64
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2e32d5fb0dd21a29780a2232a0d21d60 |
| publicationDate |
2021-03-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2021083782-A1 |
| titleOfInvention |
Phase-Locked Loop (PLL) Calibration |
| abstract |
An apparatus is disclosed that implements phase-locked loop (PLL) calibration. In an example aspect, the apparatus includes a PLL and a signal extraction path. The PLL includes an error determiner with an error output node and a loop filter with a filter input node and a filter output node. The filter input node is coupled to the error output node. The PLL also includes a voltage-controlled oscillator (VCO) with a VCO input node. The VCO input node is coupled to the filter output node. The PLL further includes a PLL tap node coupled between the filter output node and the VCO input node. The signal extraction path includes at least one switch, with the signal extraction path coupled to the PLL tap node. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2023024839-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114665870-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11658690-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022360270-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11601131-B2 |
| priorityDate |
2019-09-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |