| abstract |
According to one embodiment, a semiconductor memory device includes: a memory cell array including: a plurality of memory cells stacked above a substrate, and a plurality of word lines respectively coupled to gates of the plurality of memory cells and extending in a first direction; and a first film including a first area above the memory cell array and a second area different from the first area, and having a compressive stress higher than silicon oxide. In the first area, a plurality of first trenches extending in the first direction are aligned in a second direction that intersects the first direction. In the second area, a second trench in a mesh form is provided. |