Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-165 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41725 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41783 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66636 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02636 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0692 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66628 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 |
filingDate |
2020-07-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_45c43304189c5c1504c95a8296e776d4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ab373d54274a72078a6e2426e44662e4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_76e3bf07f1d6c60f9a95bb5c17bcd5e5 |
publicationDate |
2020-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2020350432-A1 |
titleOfInvention |
Integrated circuits having source/drain structure and method of making |
abstract |
An integrated circuit includes a gate structure over a substrate. The integrated circuit includes a first silicon-containing material structure in a recess. The first silicon-containing material structure includes a first layer below a top surface of the substrate and in direct contact with the substrate. The first silicon-containing material structure includes a second layer over the first layer, wherein an entirety of the second layer is above the top surface of the substrate, a first region of the second layer closer to the gate structure is thinner than a second region of the second layer farther from the gate structure. The first silicon-containing material structure includes a third layer between the first layer and the second layer, wherein at least a portion of the third layer is below the top surface of the substrate. |
priorityDate |
2010-11-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |