Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_67596838e2ce535372d725251027c469 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823871 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0886 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0203 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42376 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0692 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02 |
filingDate |
2019-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_83fa1d14a61ba7434e97b69d27a6c870 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0d23065e55eef33f9c6240acf8cee4fd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a5f115411fd747c406851d5788c8e357 |
publicationDate |
2020-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2020312728-A1 |
titleOfInvention |
Cmos compatible device based on four-terminal switching lattices |
abstract |
A four-terminal switch, and a switching lattice comprising four-terminal switches. The four-terminal switch operates and is fabricated according to the principles of complementary metal oxide semiconductor (CMOS) technology. The four-terminal switch includes a bulk layer; a single transistor channel located at a surface of the bulk layer; and four diffusion regions positioned around the single transistor channel. The single transistor channel is a single H shaped transistor channel and the four diffusion regions are positioned around the single H shaped transistor channel. |
priorityDate |
2019-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |