Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9047b16961c0aee78d7de367969339b2 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11565 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76802 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0274 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31111 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-35 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-50 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11582 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11582 |
filingDate |
2019-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_53dc046eec32cf9e7d313443921d9431 |
publicationDate |
2020-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2020273879-A1 |
titleOfInvention |
Semiconductor memory device |
abstract |
According to one embodiment, a semiconductor memory device includes: first interconnect layers; a second interconnect layer separate from the first interconnect layers; a third interconnect layer separate from the first interconnect layers and adjacent to the second interconnect layer in a second direction; a first memory pillar which passes through the second interconnect layer; a second memory pillar which passes through the third interconnect layer. The second interconnect layer includes a first portion connected to a first contact plug. The third interconnect layer includes a second portion connected to a second contact plug. The first and second portions are arranged along a third direction which intersects the second direction. |
priorityDate |
2019-02-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |