http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2020152770-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bcb788ac2ea1a772ff0a53a49e5e2375 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-775 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66439 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0673 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 |
| filingDate | 2019-11-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_312d30074d2efb46a4fb8343e19354da http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2439000a1950082831481c283d920584 |
| publicationDate | 2020-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2020152770-A1 |
| titleOfInvention | Method of forming a semiconductor device |
| abstract | In one aspect, a method of forming a semiconductor device includes removing a first dummy gate part extending across a first fin within a first gate trench section in an insulating layer, wherein the first dummy gate part is removed selectively to a second dummy gate part extending across a second fin within a second gate trench section in the insulating layer, and wherein each of the first and second fins is formed by a layer stack including a first layer and a second layer on the first layer, the first layer including Si1-xGex and the second layer including Si1-yGey, wherein 0≤x≤1 and 0≤y≤1 and x≠y. The method includes forming a silicon capping layer on a portion of the first fin exposed in the first gate trench section, performing an oxidation process to oxidize the silicon capping layer and to oxidize an outer thickness portion of the portion of the first fin such that a trimmed fin portion including laterally trimmed first and second layer portions remains inside the oxidized outer thickness portion, and subsequent to performing the oxidation process, removing the second dummy gate while the oxidized silicon capping layer and the oxidized outer thickness portion covers the trimmed fin portion. The method also includes removing the oxidized silicon capping layer and the oxidized outer thickness portion from the trimmed fin portion, removing the laterally trimmed first layer portion exposed in the first gate trench section and a first layer portion exposed in the second gate trench section, and forming a final gate structure around the laterally trimmed second layer portion in the first gate trench section and around a second layer portion in the second gate trench section. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11043581-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11764277-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2021305405-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022393012-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11652161-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114420639-A |
| priorityDate | 2018-11-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 35.