Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c63bc5ef3ae590b0603de4587961cac3 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11582 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-35 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32134 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0274 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C09K13-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C09K13-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-35 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31111 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-41 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1157 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11582 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-1157 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C09K13-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3213 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C09K13-04 |
filingDate |
2020-01-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5f94ae7921aa4485cd424c4ade78aa01 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9883afb8cdcb8cb575f4b86f0c6e7eeb http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_987c669d533c3291844f166ca8d20077 |
publicationDate |
2020-05-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2020144289-A1 |
titleOfInvention |
Etchant composition, method of manufacturing semiconductor device using the same, and semiconductor device |
abstract |
Provided herein is a semiconductor device and a method of manufacturing the same. The method includes alternately forming sacrificial layers and interlayer insulating layers on a semiconductor substrate. The method further includes forming a slit to expose the sacrificial layers by etching through the sacrificial layers and the interlayer insulating layers and forming interlayer openings by removing the exposed sacrificial layers. The method also includes depositing a conductive material in the interlayer openings and forming seams in which core patterns are deposited. The method additionally includes oxidizing a portion of the conductive material in the interlayer openings using a wet etching process and forming conductive patterns by removing the oxidized portion of the conductive material from the interlayer openings while leaving the seams intact. |
priorityDate |
2017-10-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |