| abstract |
An active matrix substrate includes: a substrate; TFTs supported on the substrate; and an inorganic insulating layer which covers the TFTs. Each TFT includes a gate electrode provided on the substrate, a gate insulating layer which covers the gate electrode, an oxide semiconductor layer provided on the gate insulating layer, and a source electrode and a drain electrode connected to the oxide semiconductor layer. The gate insulating layer includes a first silicon nitride layer and a first silicon oxide layer which is provided on the first silicon nitride layer. The inorganic insulating layer includes a second silicon oxide layer and a second silicon nitride layer which is provided on the second silicon oxide layer. The first silicon nitride layer, the first silicon oxide layer, the second silicon oxide layer, and the second silicon nitride layer have thicknesses which are respectively not less than 275 nm and not more than 400 nm, not less than 20 nm and not more than 80 nm, not less than 200 nm and not more than 300 nm, and not less than 100 nm and not more than 200 nm. |