| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76855
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2029-7858 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41791
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28518
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7851
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-764
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-764
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2019-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eb1b4fac313511e6db4d29727f2a2727
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f3c48555bb1d3e245a42d341ea9918c5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2a6aed2b369691db1f2350b1d95e4d04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5e4ba388609e912252e1241aef24ed35
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_286e44f2f3027351d17b7c9cd2cffe64 |
| publicationDate |
2020-04-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2020105535-A1 |
| titleOfInvention |
Semiconductor device structure with silicide and method for forming the same |
| abstract |
A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes forming a first dielectric layer over the base portion and a first sidewall of the fin portion. The method includes forming a first spacer layer over the first dielectric layer. The method includes forming a first dielectric fin over the first spacer layer. The method includes forming an epitaxial structure over the fin portion, wherein a void is surrounded by the epitaxial structure, the first dielectric layer, and the first spacer layer. The method includes removing the first spacer layer between the epitaxial structure and the first dielectric fin. The method includes forming a silicide layer over the epitaxial structure, wherein a first lower portion of the silicide layer covers a lower surface of the epitaxial structure and is in the void. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022367701-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11538913-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11302796-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11309433-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11735666-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I803861-B |
| priorityDate |
2018-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |