| abstract |
The present disclosure, in some embodiments, relates to a method of forming an integrated chip. The method includes forming an isolation structure within an upper surface of a substrate. The isolation structure surrounds a continuous region of the substrate defining a source area, a drain area, and a channel area. A gate structure is formed over the channel area. An implantation process is performed to form a source region within the source area and a drain region within the drain area. The channel area is arranged between the source region and the drain region along a first direction and extends past the source region and the drain region along a second direction that is perpendicular to the first direction. The first direction and the second direction are parallel to the upper surface of the substrate. |