Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2257 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42372 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42356 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0657 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0673 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 |
filingDate |
2019-07-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fa57155a94ec485068066724e7721ca7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6a5f69c3f59b08f18c724a24f7736558 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_15c31ac78394568dea434cbc69f28a69 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9109b68b55594387713c374f294c46cb |
publicationDate |
2019-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2019341451-A1 |
titleOfInvention |
Fabrication of perfectly symmetric gate-all-around fet on suspended nanowire using interface interaction |
abstract |
A semiconductor device including a plurality of suspended nanowires and a gate structure present on a channel region portion of the plurality of suspended nanowires. The gate structure has a uniform length extending from an upper surface of the gate structure to the base of the gate structure. The semiconductor device further includes a dielectric spacer having a uniform composition in direct contact with the gate structure. Source and drain regions are present on source and drain region portions of the plurality of suspended nanowires. |
priorityDate |
2014-07-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |