| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-171 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-3243
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06G7-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06G7-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-3287 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-3287
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06G7-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-32 |
| filingDate |
2019-02-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_429b44bc1eaf4f40992c9a144121eb4c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aa07e0c99c24a951a9ae29a1ca0eb12f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_21747acfb77b0d181ab4dff0d66658d4 |
| publicationDate |
2019-08-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2019265770-A1 |
| titleOfInvention |
Analog arithmetic circuit, semiconductor device, and electronic device |
| abstract |
The power consumption of an analog arithmetic circuit is reduced. The analog arithmetic circuit includes a plurality of first circuits. An output terminal of the k-th (k is a natural number) first circuit is connected to an input terminal of the k+1-th first circuit. Each of the first circuits includes a memory circuit which holds an analog signal, a second circuit which performs arithmetic processing using the analog signal, a switch which controls power supply to the second circuit, and a controller. The conduction state of the switch included in the k-th first circuit is controlled by the controller included in the k+1-th first circuit. The arithmetic processing performed by the second circuit included in the k+1-th first circuit is started by the controller included in the k+1-th first circuit. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2023083739-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11616494-B1 |
| priorityDate |
2014-03-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |