http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018331200-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d4bb510cace0428e3f5d989c2248638f |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78603 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0665 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-043 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78684 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-044 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4908 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-778 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1606 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate | 2017-06-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3183c906398b740f77dc9a07b8290eed |
| publicationDate | 2018-11-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2018331200-A1 |
| titleOfInvention | Tft substrate manufacturing method |
| abstract | The present invention provides a TFT substrate manufacturing method, which includes first forming a graphene semiconductor active layer on a metal foil, then sequentially forming an inorganic insulation layer and an organic base on the graphene semiconductor active layer, followed by turning up-side down to set the metal foil on a topmost layer, then forming a photoresist layer, through a patterning operation, on the metal foil and subjecting the metal foil to etching to form a source electrode and a drain electrode, then sequentially forming an organic insulation layer and a gate electrode conductor layer on the photoresist layer and the graphene semiconductor active layer, and finally, applying a photoresist peeling agent to remove the photoresist layer with portions of the organic insulation layer and the gate electrode conductor layer located thereon removed therewith so as to obtain patterned gate insulation layer and gate electrode. The manufacturing method involves an operation of turning up-side down to to allow the metal foil that is used to deposit a graphene film to be re-used as an electrode material for formation of the source and drain electrodes so that an effect of lowering down manufacturing cost and simplifying operations can be achieved. And, through application of lift-off technique, only one mask is necessary to obtain patterned source electrode, drain electrode, and gate electrode. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11158724-B1 |
| priorityDate | 2017-05-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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