http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018138285-A1

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filingDate 2016-11-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_00bce727f13f1c798e788d1f13fcef73
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publicationDate 2018-05-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2018138285-A1
titleOfInvention Methods of forming integrated circuit structure with silicide reigon
abstract Embodiments of the present disclosure relate to methods of forming an integrated circuit (IC) structure with a silicide region. Methods according to the present disclosure can include providing a structure including: a semiconductor region positioned on an electrostatic chuck, and a precursor metal positioned on and in contact with the semiconductor region; heating the semiconductor region of the structure to an annealing temperature by increasing a temperature of the electrostatic chuck; irradiating the structure with a radiant heat source, such that at least some of the precursor metal migrates into a portion of the semiconductor region to form a silicide region during the irradiating; and removing a remainder of the precursor metal from the structure to expose the silicide region, after the irradiating.
priorityDate 2016-11-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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