Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bd4db58edbac5ab3d42c1f092a7dd317 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-018521 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-00384 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0185 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-003 |
filingDate |
2017-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8e079e368e340ed86a72193dfce28c0f |
publicationDate |
2017-11-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2017338822-A1 |
titleOfInvention |
Process-compensated level-up shifter circuit |
abstract |
A level-up shifter circuit is suitable for high speed and low power applications. The circuit dissipates almost no static power, or leakage current, compared to conventional designs and can preserve the signal's duty cycle even at high data rates. This circuit can be used with a wide range of power supplies while maintaining operational integrity, and includes circuitry to compensate for process variations. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2020205706-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-3949132-A4 |
priorityDate |
2016-05-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |