http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017270233-A1

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-39
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-392
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F17-50
filingDate 2016-03-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e39255a9a630a815f181d6720f8abddc
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e3e3e0e2a450375b8c45205fd01f1431
publicationDate 2017-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2017270233-A1
titleOfInvention Checking wafer-level integrated designs for antenna rule compliance
abstract Methods and systems for checking a wafer-level design for compliance with a rule include identifying nets that cross chip boundaries for each of a plurality of chip layouts. Net properties are determined for each of the identified nets. Interconnected identified nets are combined into one or more virtual ensembles having properties defined by a sum of the properties of the respective interconnected nets. Each virtual ensemble is evaluated for compliance with a design rule. The chip layouts related to virtual ensembles that do not comply with the design rule are modified to bring non-compliant virtual ensembles into compliance.
priorityDate 2016-03-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID91501

Total number of triples: 22.