| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-82345
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28185
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 |
| filingDate |
2017-05-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1703684790545ea44ae4ab0e0fba95b4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_461ad7ffa039b59e0a0db8439512590b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_15cdaaae3c742b07e1b45134d3cf8930
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8797a93dda86c98889981d74eef92a40 |
| publicationDate |
2017-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2017256455-A1 |
| titleOfInvention |
Methods to form multi threshold-voltage dual channel without channel doping |
| abstract |
Methods to form multi V t channels, including a single type of WF material, utilizing lower annealing temperatures and the resulting devices are disclosed. Embodiments include providing an interfacial-layer on a semiconductor substrate; forming a first high-k dielectric-layer on the interfacial-layer; forming a second high-k dielectric-layer and a first cap-layer, respectively, on the first high-k dielectric-layer; removing the second high-k dielectric and first cap layers in first and second regions; forming a second cap-layer on the first high-k dielectric-layer in the first and second regions and on the first cap-layer in a third region; performing an annealing process; removing the second cap-layer from all regions and the first cap-layer from the third region; forming a third high-k dielectric-layer over all regions; forming a work-function composition-layer and a barrier-layer on the third high-k dielectric-layer in all regions; removing the barrier-layer from the first region; and forming a gate electrode over all regions. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I787866-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20200050402-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111128737-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102288782-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11081584-B2 |
| priorityDate |
2016-02-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |