| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78391
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0922
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40111
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-516
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28291
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1159
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28185
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B51-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823857 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-51
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-1159
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2017-02-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6b1ec268d6906e637acbaabfece83803
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_14ac756cf99de3875e3f6a87e5fb5d38 |
| publicationDate |
2017-05-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2017148919-A1 |
| titleOfInvention |
Semiconductor circuit element |
| abstract |
A semiconductor circuit element includes a first semiconductor device positioned in and above a first active region of a semiconductor substrate and a second semiconductor device positioned in and above a second active region of the semiconductor substrate. The first semiconductor device includes a first gate structure having a first gate dielectric layer that includes a first high-k material, and the second semiconductor device includes a second gate structure having a second gate dielectric layer that includes a ferroelectric material that is different from the first high-k material. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11751400-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11004867-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112490290-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11411106-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I732236-B |
| priorityDate |
2014-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |