| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-525
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-1073 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76841
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76805
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 |
| filingDate |
2015-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_599e235d2d23445764ad8b62734eeede
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d1fbc87a5b4493645e9ccd11b76867b3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3e0d9795c1dd7fbcb00bf54e3fa46923
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_67c71643e2cced80e88b465cda7b4bbc
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_76e9b263a846718f0a063370446ffb53
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8ea1d77314da66657d3a29dd5dc6e36d |
| publicationDate |
2017-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2017125341-A1 |
| titleOfInvention |
Integrated circuit structure and method of forming the same |
| abstract |
An integrated circuit structure with a back side through silicon via (B/S TSV) therein and a method of forming the same is disclosed. The method includes the steps of: receiving a wafer comprising a substrate having a front side that has a conductor thereon and a back side; forming a back side through silicon via (B/S TSV) from the back side of the substrate to penetrate the substrate; and filling the back side through silicon via (B/S TSV) with a conductive material to form an electrical connection with the conductor. Thus a back side through silicon via penetrates the back side of the substrate and electrically connects to the conductor on the front side of the substrate is formed. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10643926-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115172339-A |
| priorityDate |
2015-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |