| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a6bcf951b2c0d92fa4e72e1179e7d5a2 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-547
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02P70-50 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-02167
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-0682
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-02363
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-028
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-022425
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-022441
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-1804 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-0216
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-0224
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-028
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L31-068 |
| filingDate |
2016-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_18a18aaeee77dba3214e92c3194f0369 |
| publicationDate |
2017-04-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2017117432-A1 |
| titleOfInvention |
Damage-and-resist-free laser patterning of dielectric films on textured silicon |
| abstract |
In accordance with embodiments disclosed herein, there are provided methods and systems for implementing damage-and-resist-free laser patterning of dielectric films on textured silicon. For example, in one embodiment, such means include means for depositing a Silicon nitride (SiNx) or SiOx (silicon oxide) layer onto a crystalline silicon (c-Si) substrate by a Plasma Enhanced Chemical Vapor Deposition (PECVD) processing; depositing an amorphous silicon (a-Si) film on top of the SiNx or SiOx layer; patterning the a-Si film to define an etch mask for the SiNx or SiOx layer; removing the SiNx or SiOx layer via a Buffered Oxide Etch (BOE) chemical etch to expose the c-Si surface; removing the a-Si mask with a hydrogen plasma etch in a PECVD tool to prevent current loss from the mask; and plating the exposed c-Si surface with metal contacts. Other related embodiments are disclosed. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110634999-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2020137582-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-WO2020137582-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2020205253-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10861998-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11393938-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018366608-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-7202396-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109935640-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10916708-B2 |
| priorityDate |
2015-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |