| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c63bc5ef3ae590b0603de4587961cac3 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-1016
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-1657
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0804
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-60 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0611
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0656
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0679
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0685
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0626
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0802
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0655
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0622
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-08 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-0802
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-06 |
| filingDate |
2016-10-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5732ad49b423f03be4f231a33e01b733
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_65dc365e85de941c667652135b1d2887
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b2c95e21acaaa33521f2aba0f484748c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c0f0d33e57678fd85b72ab587343d1f7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f5fcd09739dd0dbc29bdde52138cba28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5076e96669cd8792f1d40538a8877f67 |
| publicationDate |
2017-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2017109075-A1 |
| titleOfInvention |
Memory system |
| abstract |
A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10290348-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-RE49496-E
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-107294768-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11755255-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11347444-B2 |
| priorityDate |
2015-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |