| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-0603
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-02126 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-417
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7395
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02118
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28026
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-56
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3192
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2644
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-44
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-34 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-45 |
| filingDate |
2014-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_988ddc7d29a1b585bc216de499f5f2f0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_11bc58f65eb7027c1449bc42f2813f58
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c1291d02f510c0e448cdbfdc52ce6b3d |
| publicationDate |
2016-11-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2016334458-A1 |
| titleOfInvention |
Semiconductor device and method for testing same |
| abstract |
A purpose of the present invention is to provide a technique capable of suppressing an electric discharge during evaluation. A semiconductor device includes: a semiconductor base body having an element region and a terminal region; a plurality of electrode pads disposed in an area that is in the element region of the semiconductor base body and is separated from the terminal region, an insulating protection film having an opening provided above each of the electrode pads; and a plurality of conductive layers disposed on the protection film and electrically connected to the plurality of electrode pads, respectively, through the opening. In a planar view, each of the conductive layers is extended to the terminal region or the vicinity of the terminal region. |
| priorityDate |
2014-03-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |