http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2016216314-A9

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filingDate 2012-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_90b67d0990a406984958e52a4b285fbc
publicationDate 2016-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2016216314-A9
titleOfInvention Apparatus and method for combined micro-scale and nano-scale c-v, q-v, and i-v testing of semiconductor materials
abstract Current Voltage and Capacitance Voltage (IV and CV) measurements are critical in measurement of properties of electronic materials especially semiconductors. A semiconductor testing device to accomplish IV and CV measurement supports a semiconductor wafer and provides a probe for contacting a surface on the wafer under control of an atomic Force Microscope or similar probing device for positioning the probe to a desired measurement point on the wafer surface. Detection of contact by the probe on the surface is accomplished and test voltage is supplied to the semiconductor wafer. A first circuit for measuring capacitance sensed by the probe based on the test voltage and a complimentary circuit for measuring Fowler Nordheim current sensed by the probe based on the test voltage are employed with the probe allowing the calculation of characteristics of the semiconductor wafer based on the measured capacitance and Fowler Nordheim current.
priorityDate 2006-07-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 23.