| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2a74d4b4f3cb9c54fd3e4c68818fa34a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3cfecdfeec3709fe2f801970103c382c |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-49
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-13091 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66825
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4916
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0203
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-573
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B69-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0629
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B20-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-788
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G05F3-205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-105 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L49-02 |
| filingDate |
2014-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fbb5c0cc951cd831211740b25de0138c |
| publicationDate |
2016-04-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2016099219-A1 |
| titleOfInvention |
Semiconductor Device Having Features to Prevent Reverse Engineering |
| abstract |
It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but different voltage levels to create different logic devices. Alternatively, the disclosed uses devices having different geometries and the same operating characteristics. Also disclosed is a method of designing a chip using these devices. |
| priorityDate |
2011-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |